Japan has committed over ¥1 trillion (Yen) in new funding to dramatically accelerate its domestic semiconductor manufacturing capabilities with the primary goal of supporting chipmaker Rapidus as it aims for 2-nanometre (2nm) chip mass production by 2027.
This massive investment is a key pillar of Japan’s national strategy to revive its standing in the advanced semiconductor industry amid intense global competition and geopolitical pressure to secure supply chains.
💰 The Funding Breakdown and Allocation
The total funding package is strategically spread across two fiscal years and combines direct subsidies with in-kind support:
- Fiscal 2026: Approximately ¥630 billion
- Fiscal 2027: An additional ¥300 billion (Note: The provided total of over ¥1 trillion suggests other related allocations are included in the overall package.)
Key Uses of the Capital
- Direct Subsidies: Financial support for research, development, and building out the complex manufacturing infrastructure.
- Infrastructure & In-Kind Support: This includes government-backed manufacturing facilities and specialized, high-cost equipment, which will be exchanged for shares in the company.
- Strategic Equity: The funding structure is expected to include equity-linked support, which would make the Japanese government the largest shareholder in Rapidus. Furthermore, a “golden share” is anticipated, granting the state veto power over critical business decisions to protect national interests and control the technology’s application.
🚀 Rapidus’s Aggressive Roadmap
Rapidus, a joint venture backed by major Japanese companies and the Ministry of Economy, Trade and Industry (METI), is positioned as the centerpiece of this national tech strategy.
| Target Technology | Target Milestone | Significance |
| 2-nanometre (2nm) | Mass Production by Fiscal 2027 | This is the primary and most ambitious near-term goal, aiming to put Japan on par with global leaders like TSMC and Samsung in the most advanced chip node. Rapidus is collaborating with IBM on the technology transfer for its 2nm Gate-All-Around (GAA) process. |
| 1.4nm and 1nm | Development Roadmap | Plans are already underway for the next-generation nodes, which will require sustained R&D and collaboration with global partners like imec. |
The total investment into the sector, including private capital, is projected to reach ¥5 trillion to ¥7 trillion in the coming years, underscoring the long-term nature of this revival effort.
🌍 Strategic Context: Global Chip Competition
Japan’s move to funnel massive public funds into Rapidus is a direct response to a global environment defined by:
- Geopolitical Competition: The race for supremacy in advanced chip technology is a matter of national security and economic power, with the US, South Korea, Taiwan, and China all investing heavily.
- Supply Chain Resilience: The COVID-19 pandemic and rising international tensions exposed the risks of relying on concentrated sources for critical chip supply, driving governments worldwide to diversify domestic production.
- AI Demand: High-performance 2nm chips are essential for next-generation AI processors, high-performance computing (HPC), and other cutting-edge technologies.
By pursuing 2nm manufacturing, Japan is seeking to leapfrog a decade of technological delay and secure a strategic role as a reliable supplier of the world’s most advanced logic chips.
Would you like to know more about the Gate-All-Around (GAA) transistor technology that Rapidus is using for its 2nm chips?